Simulink Logic Exercise – Beginner Level
By: Prakash Shakti

Introduction

Hello guys welcome to MAE Learning and in this Simulink exercise we will learn and develop “Door Lock Control System”. Modern vehicles use a central door locking system. This system improves both safety and convenience. This system ensures that the doors get locked/unlocked based on speed and user’s commands (like pressing the unlock button).

Here we will implement this logic in Simulink. After that, we can easily do work like simulation, verification, and integration.

System Requirements

  • Lock All Doors: In this condition, if vehicle speed > 10 km/h, then all doors will be automatically locked.
  • Unlock All Doors: During this condition, If vehicle speed < 5 km/h and driver presses unlock button, then all doors will be unlocked.

Simulink Model Design

Logic Design

Inputs

  • Speed_kmph: Numeric input of vehicle speed.
  • UnlockBtn: Logical signal (1 = pressed, 0 = not pressed), indicating the driver’s unlock request.

Logical Operations

Speed ​​Comparison:

  • Speed_kmph > 10 → Lock condition.
  • Speed_kmph < 5 → Unlock condition (valid only when UnlockBtn is pressed).
  • AND Logic for Unlock: Unlock will happen only when both conditions are true (Speed ​​< 5 and UnlockBtn pressed).
  • State Holding: If no condition is active, system will hold last state (locked/unlocked). This is done by using feedback mechanism (prev_lock) so that doors are not toggled unnecessarily.

Block Diagram Overview

  • Speed ​​Comparison Blocks: Generate logical signals according to speed thresholds.
  • AND, OR, NOT, Unit Delay Blocks: Combined to decide the final lock/unlock output.
  • Lock State Output: Drives the actuator or indicator (1 = Locked, 0 = Unlocked).

Model Implementation Steps

  1. Add Input Blocks: Add Constant/Input blocks for Speed ​​and Unlock Button.
  2. Add Comparison Blocks: Use Speed ​​> 10 and Speed ​​< 5 to check.
  3. Combine Logic: Use AND for Unlock, and OR for final commands.
  4. Add State Memory: Hold previous lock state with Unit Delay or Memory block.
  5. Wire Outputs: Arrange final output to reflect latest command correctly.

Simulation Graph

Output

  • Lock_Next: Signal which shows the state of the door → High = Locked, Low = Unlocked.
  • Scenario:
  • If speed > 10 km/h → Lock_Next = 1 (Locked).
  • If speed < 5 km/h and UnlockBtn = 1 → Lock_Next = 0 (Unlocked).
  • Otherwise → Last state is maintained.
  • Waveforms: Simulation plots show step changes in speed and unlock button press, and verify that the model follows expected behavior.